Docs: Fix additional typos

This commit is contained in:
Mykola Grymalyuk
2022-07-16 15:21:59 -06:00
parent 11bd7a4083
commit 3296a4a9da
8 changed files with 25 additions and 25 deletions
+3 -3
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@@ -1,9 +1,9 @@
/* Disable the non-existant Co-processor Bridge found on Arrandale, Lynnfield and Clarkdale Macs.
/* Disable the non-existent Co-processor Bridge found on Arrandale, Lynnfield and Clarkdale Macs.
* IOPCIFamily in macOS 11.0 up-to 11.2 was unable to handle ACPI probing when device was not present,
* therefore kernel panicing the machine.
* therefore kernel panicking the machine.
*
* This SSDT reports the device as disabled avoiding the probing.
* Not required for macOS 11.2 and newer, however recommended to alleviate pottential issues
* Not required for macOS 11.2 and newer, however recommended to alleviate potential issues
*/
DefinitionBlock ("", "SSDT", 2, "DRTNIA", "CPBGoff", 0x00001000)
{
+11 -11
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@@ -4,15 +4,15 @@
* hardware modifications.
*
* Notes:
* - SSDT must be used in conjuction with '_INI' to 'XINI' patch
* - SSDT must be used in conjunction with '_INI' to 'XINI' patch
* to reroute PCI0 initialization.
*
*
* - AMD drivers in macOS may still attempt to attach and kernel
* panic. Disable the dGPU with class-code/device-id spoof or
* with '-wegnoegpu'.
*
* - dGPU will reactivate with sleep-wake, additional process
* is needed to disable the dGPU.
* is needed to disable the dGPU.
* - ie. AMDGPUWakeHandler.kext for macOS
*
* Ref:
@@ -30,13 +30,13 @@ DefinitionBlock ("", "SSDT", 2, "DRTNIA", "dGPU_OFF", 0x00001000)
OperationRegion (IOGP, SystemIO, 0x0700, 0x51)
Field (IOGP, ByteAcc, NoLock, Preserve)
{
Offset (0x10),
P710, 8,
Offset (0x28),
P728, 8,
Offset (0x40),
P740, 8,
Offset (0x50),
Offset (0x10),
P710, 8,
Offset (0x28),
P728, 8,
Offset (0x40),
P740, 8,
Offset (0x50),
P750, 8
}
@@ -90,7 +90,7 @@ DefinitionBlock ("", "SSDT", 2, "DRTNIA", "dGPU_OFF", 0x00001000)
Store (0x07D9, OSYS)
}
}
// Disables dGPU
Store ("Requesting dGPU power off", Debug)
P728 = One // Switch select
+1 -1
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@@ -1,6 +1,6 @@
/* Removes PCI0's 32-bit Allocation Limitation to resolve PCIe device support on Sandy and
* Ivy Bridge Macs, mainly applicable for Audio and eGPU support.
* BUF0 to BUF1 patch required to override exisiting BuffObj in DSDT.
* BUF0 to BUF1 patch required to override existing BuffObj in DSDT.
*
* Source:
* https://egpu.io/forums/pc-setup/fix-dsdt-override-to-correct-error-12/